The semiconductor integrated circuit industry has experienced rapid development in the past years. With the development of the IC technology, integrated circuits are manufactured with higher functional density (numbers of devices in each chip) and smaller size (the minimum dimensions of the devices that can be manufactured by the manufacturing process). Although such scaling down of device dimensions enhances productivity and reduces production cost, it also increases manufacturing and processing complexity.
As technology advances to the nano-node, some manufacturers are making a transition to FinFETs from planar devices, in order to achieve higher device density, better device performance and lower cost. Compared with the planar device, the FinFET has suppressed short channel effect due to the good control over the channel.
The FinFET technology has been developed by resolving various manufacturing and design challenges. Currently, the FinFET technology has been applied in the 20 nm technology node. Although the FinFET devices and their manufacturing method have basically achieved expected results, they are not fully satisfactory in all aspects.
The FinFET is a multi-gate MOSFET. According to the number of gates, the FinFET can be classified into double-gate FinFET, triple-gate FinFET, and gate-all-around FinFET in which the gates are placed on all four sides of the fin.
The double-gate FinFET has two gates respectively placed on two opposing sides of the fin to separately control the channel current. In the actual application, the double-gate FinFET is used in the core logical circuit which requires low current leakage.
The triple-gate FinFET has three gates, two placed on two opposing sides of the fin and one placed on the top surface of the fin. The gates are isolated from the fin through an underlying insulating layer below the gates, the fin is isolated from the substrate though another insulating layer below the fin. The fin structure of the triple-gate FinFET can be formed on the SOI substrate or the bulk silicon substrate. Since the three sides of the fin are all controlled by the gates, carriers in the active regions can be controlled better compared with the conventional MOSFET, driving current can be increased, thereby improving the device performance. Nowadays, the FinFETs applied widely in the industry are mainly triple-gate FinFETs.
With the increasing demand for device performance, the gate-all-around FinFET which enables gate control over four sides is developed. The gate-all-around FinFET can effectively increase gate control ability and suppress the short channel effect.
The gate-all-around FinFET generally has a suspended gate structure. The manufacturing method of the gate-all-around FinFET is as follows:
Firstly, forming active regions by a planar process; then, removing the lower portion of the active regions to form a suspended gate region; afterwards, forming a gate dielectric layer; and finally, depositing polysilicon to form the control gates.
The gate-all-around FinFET may also have a vertical-type gate structure in which the active regions are vertical to the substrate surface. However, such structure is more complicated in manufacturing.
From above, the conventional manufacturing process for gate-all-around FinFETs is very complicated and costly, which limits the rapid development of FinFET devices with low cost and high productivity. Accordingly, how to provide a simple, reliable, low-cost manufacturing method to form gate-all-around FinFETs with high performance is a problem to be resolved by those skilled in the art.